summaryrefslogtreecommitdiffstats
path: root/firmware/drivers/serial.c
blob: 30e5f33900587782cc2fb2898ccea668a063f886 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
/***************************************************************************
 *             __________               __   ___.
 *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
 *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
 *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
 *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
 *                     \/            \/     \/    \/            \/
 * $Id$
 *
 * Copyright (C) 2002 by Alan Korr & Nick Robinson
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
 * KIND, either express or implied.
 *
 ****************************************************************************/
#include <stdio.h>
#include <stdlib.h>
#include <stdarg.h>
#include "button.h"
#include "config.h"
#include "cpu.h"
#include "system.h"
#include "kernel.h"
#include "lcd.h"
#include "serial.h"
#include "iap.h"

#if CONFIG_CPU == IMX31L
#include "serial-imx31.h"
#endif

#if CONFIG_CPU == SH7034

/* FIX: this doesn't work on iRiver or iPod yet */
/* iFP7xx has no remote */

/* Received byte identifiers */
#define PLAY  0xC1
#define STOP  0xC2
#define PREV  0xC4
#define NEXT  0xC8
#define VOLUP 0xD0
#define VOLDN 0xE0

void serial_setup (void)
{
    /* Set PB10 function to serial Rx */
    PBCR1 = (PBCR1 & 0xffcf) | 0x0020;

    SMR1 = 0x00;
    SCR1 = 0;
    BRR1 = (FREQ/(32*9600))-1;
    and_b(0, &SSR1); /* The status bits must be read before they are cleared,
                        so we do an AND operation */

    /* Let the hardware settle. The serial port needs to wait "at least
       the interval required to transmit or receive one bit" before it
       can be used. */
    sleep(1);

    SCR1 = 0x10; /* Enable the receiver, no interrupt */
}

int tx_rdy(void)
{
    /* a dummy */
    return 1;
}

int rx_rdy(void)
{
    if(SSR1 & SCI_RDRF)
        return 1;
    else
        return 0;
}

void tx_writec(unsigned char c)
{
    /* a dummy */
    (void)c;
}

unsigned char rx_readc(void)
{
    char tmp;
    /* Read byte and clear the Rx Full bit */
    tmp = RDR1;
    and_b(~SCI_RDRF, &SSR1);
    return tmp;
}


/* This function returns the received remote control code only if it is
   received without errors before or after the reception.
   It therefore returns the received code on the second call after the
   code has been received. */
int remote_control_rx(void)
{
    static int last_valid_button = BUTTON_NONE;
    static int last_was_error = false;
    int btn;
    int ret = BUTTON_NONE;

    /* Errors? Just clear'em. The receiver stops if we don't */
    if(SSR1 & (SCI_ORER | SCI_FER | SCI_PER)) {
        and_b(~(SCI_ORER | SCI_FER | SCI_PER), &SSR1);
        last_valid_button = BUTTON_NONE;
        last_was_error = true;
        return BUTTON_NONE;
    }

    if(rx_rdy()) {
        btn = rx_readc();

        if(last_was_error)
        {
            last_valid_button = BUTTON_NONE;
            ret = BUTTON_NONE;
        }
        else
        {
            switch (btn)
            {
                case STOP:
                    last_valid_button = BUTTON_RC_STOP;
                    break;

                case PLAY:
                    last_valid_button = BUTTON_RC_PLAY;
                    break;

                case VOLUP:
                    last_valid_button = BUTTON_RC_VOL_UP;
                    break;

                case VOLDN:
                    last_valid_button = BUTTON_RC_VOL_DOWN;
                    break;

                case PREV:
                    last_valid_button = BUTTON_RC_LEFT;
                    break;

                case NEXT:
                    last_valid_button = BUTTON_RC_RIGHT;
                    break;

                default:
                    last_valid_button = BUTTON_NONE;
                    break;
            }
        }
    }
    else
    {
        /* This means that a valid remote control character was received
           the last time we were called, with no receiver errors either before
           or after. Then we can assume that there really is a remote control
           attached, and return the button code. */
        ret = last_valid_button;
        last_valid_button = BUTTON_NONE;
    }

    last_was_error = false;

    return ret;
}

#elif defined(CPU_COLDFIRE)

void serial_setup (void)
{
    UCR0 = 0x30; /* Reset transmitter */
    UCSR0 = 0xdd; /* Timer mode */

    UCR0 = 0x10;  /* Reset pointer */
    UMR0 = 0x13; /* No parity, 8 bits */
    UMR0 = 0x07; /* 1 stop bit */

    UCR0 = 0x04; /* Tx enable */
}

int tx_rdy(void)
{
    if(USR0 & 0x04)
        return 1;
    else
        return 0;
}

int rx_rdy(void)
{
    /* a dummy */
    return 0;
}

void tx_writec(unsigned char c)
{
    UTB0 = c;
}

#elif (CONFIG_CPU == IMX31L)

void serial_setup(void)
{
#ifdef UART_INT /*enable UART Interrupts */
    UCR1_1 |= (EUARTUCR1_TRDYEN | EUARTUCR1_RRDYEN | EUARTUCR1_TXMPTYEN);
    UCR4_1 |= (EUARTUCR4_TCEN);
#else /*disable UART Interrupts*/
    UCR1_1 &= ~(EUARTUCR1_TRDYEN | EUARTUCR1_RRDYEN | EUARTUCR1_TXMPTYEN);
    UCR4_1 &= ~(EUARTUCR4_TCEN);
#endif
    UCR1_1 |= EUARTUCR1_UARTEN;
    UCR2_1 |= (EUARTUCR2_TXEN  | EUARTUCR2_RXEN | EUARTUCR2_IRTS);

    /* Tx,Rx Interrupt Trigger levels, Disable for now*/
    /*UFCR1 |= (UFCR1_TXTL_32 | UFCR1_RXTL_32);*/
}

int tx_rdy(void)
{
    if((UTS1 & EUARTUTS_TXEMPTY))
        return 1;
    else
        return 0;
}

/*Not ready...After first Rx, UTS1 & UTS1_RXEMPTY
  keeps returning true*/
int rx_rdy(void)
{
    if(!(UTS1 & EUARTUTS_RXEMPTY))
        return 1;
    else
        return 0;
}

void tx_writec(unsigned char c)
{
    UTXD1=(int) c;
}

#elif defined(IPOD_ACCESSORY_PROTOCOL)
static int autobaud = 0;
void serial_setup (void)
{
    int tmp;

#if (MODEL_NUMBER == 3) || (MODEL_NUMBER == 8)

    /* Route the Tx/Rx pins.  4G Ipod??? */
    outl(0x70000018, inl(0x70000018) & ~0xc00);
#elif (MODEL_NUMBER == 4) || (MODEL_NUMBER == 5)

    /* Route the Tx/Rx pins.  5G Ipod */
    (*(volatile unsigned long *)(0x7000008C)) &= ~0x0C;
    GPO32_ENABLE &= ~0x0C;
#endif

    DEV_EN = DEV_EN | DEV_SER0;
    CPU_HI_INT_DIS = SER0_MASK;

    DEV_RS |= DEV_SER0;
    sleep(1);
    DEV_RS &= ~DEV_SER0;

    SER0_LCR = 0x80; /* Divisor latch enable */
    SER0_DLM = 0x00;
    SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */
    SER0_IER = 0x01;

    SER0_FCR = 0x07; /* Tx+Rx FIFO reset and FIFO enable */

    CPU_INT_EN |= HI_MASK;
    CPU_HI_INT_EN |= SER0_MASK;
    tmp = SER0_RBR;

    serial_bitrate(0);
}

void serial_bitrate(int rate)
{
    if(rate == 0)
    {
        autobaud = 2;
        SER0_LCR = 0x80; /* Divisor latch enable */
        SER0_DLL = 0x0D; /* 24000000/13/16 = 115384 baud */
        SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */
        return;
    }

    autobaud = 0;
    SER0_LCR = 0x80; /* Divisor latch enable */
    SER0_DLL = 24000000L / rate / 16;
    SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */
}

int tx_rdy(void)
{
    if((SER0_LSR & 0x20))
        return 1;
    else
        return 0;
}

int rx_rdy(void)
{
    if((SER0_LSR & 0x1))
        return 1;
    else
        return 0;
}

void tx_writec(unsigned char c)
{
    SER0_THR =(int) c;
}

unsigned char rx_readc(void)
{
    return (SER0_RBR & 0xFF);
}

void SERIAL0(void)
{
    static int badbaud = 0;
    static bool newpkt = true;
    char temp;

    while(rx_rdy())
    {
        temp = rx_readc();
        if (newpkt && autobaud > 0)
        {
            if (autobaud == 1)
            {
                switch (temp)
                {
                    case 0xFF:
                    case 0x55:
                        break;
                    case 0xFC:
                        SER0_LCR = 0x80; /* Divisor latch enable */
                        SER0_DLL = 0x4E; /* 24000000/78/16 = 19230 baud */
                        SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */
                        temp = 0xFF;
                        break;
                    case 0xE0:
                        SER0_LCR = 0x80; /* Divisor latch enable */
                        SER0_DLL = 0x9C; /* 24000000/156/16 = 9615 baud */
                        SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */
                        temp = 0xFF;
                        break;
                    default:
                        badbaud++;
                        if (badbaud >= 6) /* Switch baud detection mode */
                        {
                            autobaud = 2;
                            SER0_LCR = 0x80; /* Divisor latch enable */
                            SER0_DLL = 0x0D; /* 24000000/13/16 = 115384 baud */
                            SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */
                            badbaud = 0;
                        } else {
                            SER0_LCR = 0x80; /* Divisor latch enable */
                            SER0_DLL = 0x1A; /* 24000000/26/16 = 57692 baud */
                            SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */
                        }
                        continue;
                }
            } else {
                switch (temp)
                {
                    case 0xFF:
                    case 0x55:
                        break;
                    case 0xFE:
                        SER0_LCR = 0x80; /* Divisor latch enable */
                        SER0_DLL = 0x1A; /* 24000000/26/16 = 57692 baud */
                        SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */
                        temp = 0xFF;
                        break;
                    case 0xFC:
                            SER0_LCR = 0x80; /* Divisor latch enable */
                        SER0_DLL = 0x27; /* 24000000/39/16 = 38461 baud */
                        SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */
                        temp = 0xFF;
                        break;
                    case 0xE0:
                        SER0_LCR = 0x80; /* Divisor latch enable */
                        SER0_DLL = 0x4E; /* 24000000/78/16 = 19230 baud */
                        SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */
                        temp = 0xFF;
                        break;
                    default:
                        badbaud++;
                        if (badbaud >= 6) /* Switch baud detection */
                        {
                            autobaud = 1;
                            SER0_LCR = 0x80; /* Divisor latch enable */
                            SER0_DLL = 0x1A; /* 24000000/26/16 = 57692 baud */
                            SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */
                            badbaud = 0;
                        } else {
                            SER0_LCR = 0x80; /* Divisor latch enable */
                            SER0_DLL = 0x0D; /* 24000000/13/16 = 115384 baud */
                            SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */
                        }
                        continue;
                }
            }
        }
        bool pkt = iap_getc(temp);
        if(newpkt == true && pkt == false)
            autobaud = 0; /* Found good baud */
        newpkt = pkt;
    }
}

#endif

void dprintf(const char * str, ... )
{
    char dprintfbuff[256];
    char * ptr;

    va_list ap;
    va_start(ap, str);

    ptr = dprintfbuff;
    vsnprintf(ptr,sizeof(dprintfbuff),str,ap);
    va_end(ap);

    serial_tx((unsigned char *)ptr);
}

void serial_tx(const unsigned char * buf)
{
    /*Tx*/
    for(;;) {
        if(tx_rdy()) {
            if(*buf == '\0')
                return;
            if(*buf == '\n')
                tx_writec('\r');
            tx_writec(*buf);
            buf++;
        }
    }
}