summaryrefslogtreecommitdiffstats
path: root/firmware/target/arm/as3525/pcm-as3525.c
blob: ddb4d86bd47165b2e6b5746752359c627a3e5cf9 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
/***************************************************************************
 *             __________               __   ___.
 *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
 *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
 *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
 *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
 *                     \/            \/     \/    \/            \/
 * $Id$
 *
 * Copyright © 2008-2009 Rafaël Carré
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
 * KIND, either express or implied.
 *
 ****************************************************************************/
#include "system.h"
#include "audio.h"
#include "string.h"
#include "as3525.h"
#include "pl081.h"
#include "dma-target.h"
#include "clock-target.h"
#include "panic.h"
#include "as3514.h"
#include "audiohw.h"
#include "mmu-arm.h"
#include "pcm-internal.h"

#define MAX_TRANSFER (4*((1<<11)-1)) /* maximum data we can transfer via DMA
                                      * i.e. 32 bits at once (size of I2SO_DATA)
                                      * and the number of 32bits words has to
                                      * fit in 11 bits of DMA register */

static const void *dma_start_addr;    /* Pointer to callback buffer */
static size_t dma_start_size;   /* Size of callback buffer */
static const void *dma_sub_addr;      /* Pointer to sub buffer */
static size_t dma_rem_size;     /* Remaining size - in 4*32 bits */
static size_t play_sub_size;    /* size of current subtransfer */
static void dma_callback(void);
static int locked = 0;
static bool volatile is_playing = false;
static bool play_callback_pending = false;

#ifdef HAVE_RECORDING
/* Stopping playback gates clock if not recording */
static bool volatile is_recording = false;
#endif

/* Mask the DMA interrupt */
void pcm_play_lock(void)
{
    ++locked;
}

/* Unmask the DMA interrupt if enabled */
void pcm_play_unlock(void)
{
    if(--locked == 0 && is_playing)
    {
        int old = disable_irq_save();
        if(play_callback_pending)
        {
            play_callback_pending = false;
            dma_callback();
        }
        restore_irq(old);
    }
}

static void play_start_pcm(void)
{
    const void *addr = dma_sub_addr;
    size_t size = dma_rem_size;
    if(size > MAX_TRANSFER)
        size = MAX_TRANSFER;

    play_sub_size = size;

    dma_enable_channel(0, (void*)addr, (void*)I2SOUT_DATA, DMA_PERI_I2SOUT,
                DMAC_FLOWCTRL_DMAC_MEM_TO_PERI, true, false, size >> 2,
                DMA_S16, dma_callback);
}

static void dma_callback(void)
{
    dma_sub_addr += play_sub_size;
    dma_rem_size -= play_sub_size;
    play_sub_size = 0; /* Might get called again if locked */

    if(locked)
    {
        play_callback_pending = is_playing;
        return;
    }

    if(!dma_rem_size)
    {
        if(!pcm_play_dma_complete_callback(PCM_DMAST_OK, &dma_start_addr,
                                           &dma_start_size))
            return;

        dma_sub_addr = dma_start_addr;
        dma_rem_size = dma_start_size;

        /* force writeback */
        commit_dcache_range(dma_start_addr, dma_start_size);
        play_start_pcm();
        pcm_play_dma_status_callback(PCM_DMAST_STARTED);
    }
    else
    {
        play_start_pcm();
    }
}

void pcm_play_dma_start(const void *addr, size_t size)
{
    is_playing = true;

    dma_start_addr = addr;
    dma_start_size = size;
    dma_sub_addr = dma_start_addr;
    dma_rem_size = size;

    dma_retain();

    /* force writeback */
    commit_dcache_range(dma_start_addr, dma_start_size);

    play_start_pcm();
}

void pcm_play_dma_stop(void)
{
    is_playing = false;

    dma_disable_channel(0);

    /* Ensure byte counts read back 0 */
    DMAC_CH_SRC_ADDR(0) = 0;
    dma_start_addr = NULL;
    dma_start_size = 0;
    dma_rem_size = 0;

    dma_release();

    play_callback_pending = false;
}

void pcm_play_dma_pause(bool pause)
{
    is_playing = !pause;

    if(pause)
    {
        dma_pause_channel(0);

        /* if producer's buffer finished, upper layer starts anew */
        if (dma_rem_size == 0)
            play_callback_pending = false;
    }
    else
    {
        if (play_sub_size != 0)
            dma_resume_channel(0);
        /* else unlock calls the callback if sub buffers remain */
    }
}

void pcm_play_dma_init(void)
{
    bitset32(&CGU_PERI, CGU_I2SOUT_APB_CLOCK_ENABLE);
    I2SOUT_CONTROL = (1<<6) | (1<<3);  /* enable dma, stereo */

    audiohw_preinit();
    pcm_dma_apply_settings();
}

void pcm_play_dma_postinit(void)
{
    audiohw_postinit();
}

/* divider is 9 bits but the highest one (for 8kHz) fit in 8 bits */
static const unsigned char divider[SAMPR_NUM_FREQ] = {
    [HW_FREQ_96] = ((AS3525_MCLK_FREQ/128 + SAMPR_96/2) / SAMPR_96) - 1,
    [HW_FREQ_88] = ((AS3525_MCLK_FREQ/128 + SAMPR_88/2) / SAMPR_88) - 1,
    [HW_FREQ_64] = ((AS3525_MCLK_FREQ/128 + SAMPR_64/2) / SAMPR_64) - 1,
    [HW_FREQ_48] = ((AS3525_MCLK_FREQ/128 + SAMPR_48/2) / SAMPR_48) - 1,
    [HW_FREQ_44] = ((AS3525_MCLK_FREQ/128 + SAMPR_44/2) / SAMPR_44) - 1,
    [HW_FREQ_32] = ((AS3525_MCLK_FREQ/128 + SAMPR_32/2) / SAMPR_32) - 1,
    [HW_FREQ_24] = ((AS3525_MCLK_FREQ/128 + SAMPR_24/2) / SAMPR_24) - 1,
    [HW_FREQ_22] = ((AS3525_MCLK_FREQ/128 + SAMPR_22/2) / SAMPR_22) - 1,
    [HW_FREQ_16] = ((AS3525_MCLK_FREQ/128 + SAMPR_16/2) / SAMPR_16) - 1,
    [HW_FREQ_12] = ((AS3525_MCLK_FREQ/128 + SAMPR_12/2) / SAMPR_12) - 1,
    [HW_FREQ_11] = ((AS3525_MCLK_FREQ/128 + SAMPR_11/2) / SAMPR_11) - 1,
    [HW_FREQ_8 ] = ((AS3525_MCLK_FREQ/128 + SAMPR_8 /2) / SAMPR_8 ) - 1,
};

static inline unsigned char mclk_divider(void)
{
    return divider[pcm_fsel];
}

void pcm_dma_apply_settings(void)
{
    bitmod32(&CGU_AUDIO,
             (0<<24) |               /* I2SI_MCLK2PAD_EN = disabled */
             (0<<23) |               /* I2SI_MCLK_EN = disabled */
             (0<<14) |               /* I2SI_MCLK_DIV_SEL = unused */
             (0<<12) |               /* I2SI_MCLK_SEL = clk_main */
             (1<<11) |               /* I2SO_MCLK_EN */
             (mclk_divider() << 2) | /* I2SO_MCLK_DIV_SEL */
             (AS3525_MCLK_SEL << 0), /* I2SO_MCLK_SEL */
             0x01ffffff);
}

size_t pcm_get_bytes_waiting(void)
{
    int oldstatus = disable_irq_save();
    size_t addr = DMAC_CH_SRC_ADDR(0);
    size_t start_addr = (size_t)dma_start_addr;
    size_t start_size = dma_start_size;
    restore_interrupt(oldstatus);

    return start_size - addr + start_addr;
}

const void * pcm_play_dma_get_peak_buffer(int *count)
{
    int oldstatus = disable_irq_save();
    size_t addr = DMAC_CH_SRC_ADDR(0);
    size_t start_addr = (size_t)dma_start_addr;
    size_t start_size = dma_start_size;
    restore_interrupt(oldstatus);

    *count = (start_size - addr + start_addr) >> 2;
    return (void*)AS3525_UNCACHED_ADDR(addr);
}

#ifdef HAVE_PCM_DMA_ADDRESS
void * pcm_dma_addr(void *addr)
{
    if (addr != NULL)
        addr = AS3525_UNCACHED_ADDR(addr);
    return addr;
}
#endif


/****************************************************************************
 ** Recording DMA transfer
 **/
#ifdef HAVE_RECORDING

static int rec_locked = 0;
static uint32_t *rec_dma_addr;
static size_t rec_dma_size;
static int keep_sample = 0; /* In nonzero, keep the sample; else, discard it */

void pcm_rec_lock(void)
{
    int oldlevel = disable_irq_save();

    if (++rec_locked == 1)
    {
        bitset32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE);
        VIC_INT_EN_CLEAR = INTERRUPT_I2SIN;
        I2SIN_MASK = 0; /* disables all interrupts */
    }

    restore_irq(oldlevel);
}


void pcm_rec_unlock(void)
{
    int oldlevel = disable_irq_save();

    if (--rec_locked == 0 && is_recording)
    {
        VIC_INT_ENABLE = INTERRUPT_I2SIN;
        I2SIN_MASK = (1<<2); /* I2SIN_MASK_POAF */
    }

    restore_irq(oldlevel);
}


void INT_I2SIN(void)
{
#if CONFIG_CPU == AS3525
    if (audio_channels == 1)
    {
        /* RX is left-channel-only mono */
        while (rec_dma_size > 0)
        {
            if (I2SIN_RAW_STATUS & (1<<5))
                return; /* empty */

            uint32_t value = *I2SIN_DATA;

            /* Discard every other sample since ADC clock is 1/2 LRCK */
            keep_sample ^= 1;

            if (keep_sample)
            {
                /* Data is in left channel only - copy to right channel
                   14-bit => 16-bit samples */
                value = (uint16_t)(value << 2) | (value << 18);

                if (audio_output_source != AUDIO_SRC_PLAYBACK && !is_playing)
                {
                    /* In this case, loopback is manual so that both output
                       channels have audio */
                    if (I2SOUT_RAW_STATUS & (1<<5))
                    {
                        /* Sync output fifo so it goes empty not before input is
                           filled */
                        for (unsigned i = 0; i < 4; i++)
                            *I2SOUT_DATA = 0;
                    }

                    *I2SOUT_DATA = value;
                    *I2SOUT_DATA = value;
                }

                *rec_dma_addr++ = value;
                rec_dma_size -= 4;
            }
        }
    }
    else
#endif /* CONFIG_CPU == AS3525 */
    {
        /* RX is stereo */
        while (rec_dma_size > 0)
        {
            if (I2SIN_RAW_STATUS & (1<<5))
                return; /* empty */

            uint32_t value = *I2SIN_DATA;

            /* Discard every other sample since ADC clock is 1/2 LRCK */
            keep_sample ^= 1;

            if (keep_sample)
            {
                /* Loopback is in I2S hardware */

                /* 14-bit => 16-bit samples */
                *rec_dma_addr++ = (value << 2) & ~0x00030000;
                rec_dma_size -= 4;
            }
        }
    }

    /* Inform middle layer */
    if (pcm_rec_dma_complete_callback(PCM_DMAST_OK, (void **)&rec_dma_addr,
                                      &rec_dma_size))
    {
        pcm_rec_dma_status_callback(PCM_DMAST_STARTED);
    }
}


void pcm_rec_dma_stop(void)
{
    is_recording = false;

    VIC_INT_EN_CLEAR = INTERRUPT_I2SIN;
    I2SIN_MASK = 0; /* disables all interrupts */

    rec_dma_addr = NULL;
    rec_dma_size = 0;

    bitclr32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE);
}


void pcm_rec_dma_start(void *addr, size_t size)
{
    is_recording = true;

    rec_dma_addr = addr;
    rec_dma_size = size;

    keep_sample = 0;

    /* ensure empty FIFO */
    while (!(I2SIN_RAW_STATUS & (1<<5)))
        *I2SIN_DATA;

    I2SIN_CLEAR = (1<<6) | (1<<0); /* push error, pop error */
}


void pcm_rec_dma_close(void)
{
    bitset32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE);
    pcm_rec_dma_stop();
}


void pcm_rec_dma_init(void)
{
    bitset32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE);

    I2SIN_MASK = 0; /* disables all interrupts */

    /* 14 bits samples, i2c clk src = I2SOUTIF, sdata src = AFE,
     * data valid at positive edge of SCLK */
    I2SIN_CONTROL = (1<<5) | (1<<2);
}


const void * pcm_rec_dma_get_peak_buffer(void)
{
    return rec_dma_addr;
}

#endif /* HAVE_RECORDING */