summaryrefslogtreecommitdiffstats
path: root/firmware/target/arm/olympus/mrobe-500/timer-mr500.c
blob: 21449ed19f6a8018e93e156128331360ea8dd150 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
/***************************************************************************
*             __________               __   ___.
*   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
*   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
*   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
*   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
*                     \/            \/     \/    \/            \/
* $Id$
*
* Copyright (C) 2007 by Karl Kurbjun
*
* All files in this archive are subject to the GNU General Public License.
* See the file COPYING in the source tree root for full license agreement.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/

#include "config.h"
#include "cpu.h"
#include "system.h"
#include "timer.h"
#include "logf.h"

/* GPB0/TOUT0 should already have been configured as output so that pin
   should not be a functional pin and TIMER0 output unseen there */
void TIMER0(void)
{
    if (pfn_timer != NULL)
        pfn_timer();
    IO_INTC_IRQ0 |= 1<<IRQ_TIMER0;
}

static void stop_timer(void)
{
    IO_INTC_EINT0 &= ~(1<<IRQ_TIMER0);

    IO_INTC_IRQ0 |= 1<<IRQ_TIMER0;
    
    IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_STOP;
}

bool __timer_set(long cycles, bool start)
{
    int oldlevel;
    unsigned int divider;
    /* taken from linux/arch/arm/mach-itdm320-20/time.c and timer-meg-fx.c */

  	/* Turn off all timers */
    IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_STOP;
	IO_TIMER1_TMMD = CONFIG_TIMER1_TMMD_STOP;
	IO_TIMER2_TMMD = CONFIG_TIMER2_TMMD_STOP;
	IO_TIMER3_TMMD = CONFIG_TIMER3_TMMD_STOP;

    /* Find the minimum factor that puts the counter in range 1-65535 */
    unsigned int prescaler = (cycles + 65534) / 65535;

    /* Test this by writing 1's to registers to see how many bits we have */
    /* Maximum divider setting is x / 1024 / 65536 = x / 67108864 */
    if (start && pfn_unregister != NULL)
    {
        pfn_unregister();
        pfn_unregister = NULL;
    }

    oldlevel = set_irq_level(HIGHEST_IRQ_LEVEL);

    /* Max prescale is 1023+1 */
    for (divider = 0; prescaler > 1024; prescaler >>= 1, divider++);

    /* Setup the Prescalar */
    IO_TIMER0_TMPRSCL = prescaler;

    /* Setup the Divisor */
    IO_TIMER0_TMDIV = divider;

    set_irq_level(oldlevel);

    return true;
}

bool __timer_register(void)
{
    bool retval = true;

    int oldstatus = set_interrupt_status(IRQ_FIQ_DISABLED, IRQ_FIQ_STATUS);

    stop_timer();

    /* Turn Timer0 to Free Run mode */
	IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_FREE_RUN;

	IO_INTC_EINT0 |= 1<<IRQ_TIMER0;

    set_interrupt_status(oldstatus, IRQ_FIQ_STATUS);

    return retval;
}

void __timer_unregister(void)
{
    int oldstatus = set_interrupt_status(IRQ_FIQ_DISABLED, IRQ_FIQ_STATUS);
    stop_timer();
    set_interrupt_status(oldstatus, IRQ_FIQ_STATUS);
}