summaryrefslogtreecommitdiffstats
path: root/firmware/target/arm/s5l8700/i2c-s5l8700.c
blob: 564bfdd4bdae39df30f2a9654a66b6d98ec832b0 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
/***************************************************************************
 *             __________               __   ___.
 *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
 *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
 *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
 *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
 *                     \/            \/     \/    \/            \/
 * $Id$
 *
 * Copyright (C) 2009 by Bertrik Sikken
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
 * KIND, either express or implied.
 *
 ****************************************************************************/
 
#include "config.h"
#include "system.h"
#include "kernel.h"
#include "i2c-s5l8700.h"

/*  Driver for the s5l8700 built-in I2C controller in master mode
    
    Both the i2c_read and i2c_write function take the following arguments:
    * slave, the address of the i2c slave device to read from / write to
    * address, optional sub-address in the i2c slave (unused if -1)
    * len, number of bytes to be transfered
    * data, pointer to data to be transfered
    A return value < 0 indicates an error.
    
    Known issues:
    * uses polled mode (not interrupt driven), just like the OF
    * ACK from slave is not checked, so functions never return an error
*/

static struct mutex i2c_mtx;

void i2c_init(void)
{
    mutex_init(&i2c_mtx);

    /* enable I2C pins */
    PCON10 = (2 << 2) |
             (2 << 0);

    /* enable I2C clock */
    PWRCON &= ~(1 << 5);

    /* initial config */
    IICADD = 0;
    IICCON = (1 << 7) | /* ACK_GEN */
             (1 << 6) | /* CLKSEL = PCLK/512 */
             (1 << 5) | /* INT_EN */
             (1 << 4) | /* IRQ clear */
             (3 << 0);  /* CK_REG */

    /* serial output on */
    IICSTAT = (1 << 4);
}

int i2c_write(unsigned char slave, int address, int len, const unsigned char *data)
{
    mutex_lock(&i2c_mtx);

    /* START */
    IICDS = slave & ~1;
    IICSTAT = 0xF0;
    IICCON = 0xF3;
    while ((IICCON & (1 << 4)) == 0);
    
    if (address >= 0) {
        /* write address */
        IICDS = address;
        IICCON = 0xF3;
        while ((IICCON & (1 << 4)) == 0);
    }
    
    /* write data */
    while (len--) {
        IICDS = *data++;
        IICCON = 0xF3;
        while ((IICCON & (1 << 4)) == 0);
    }

    /* STOP */
    IICSTAT = 0xD0;
    IICCON = 0xF3;
    while ((IICSTAT & (1 << 5)) != 0);
    
    mutex_unlock(&i2c_mtx);
    return 0;
}

int i2c_read(unsigned char slave, int address, int len, unsigned char *data)
{
    mutex_lock(&i2c_mtx);

    if (address >= 0) {
        /* START */
        IICDS = slave & ~1;
        IICSTAT = 0xF0;
        IICCON = 0xF3;
        while ((IICCON & (1 << 4)) == 0);

        /* write address */
        IICDS = address;
        IICCON = 0xF3;
        while ((IICCON & (1 << 4)) == 0);
    }
    
    /* (repeated) START */
    IICDS = slave | 1;
    IICSTAT = 0xB0;
    IICCON = 0xF3;
    while ((IICCON & (1 << 4)) == 0);
    
    while (len--) {
        IICCON = (len == 0) ? 0x73 : 0xF3; /* NACK or ACK */
        while ((IICCON & (1 << 4)) == 0);
        *data++ = IICDS;
    }

    /* STOP */
    IICSTAT = 0x90;
    IICCON = 0xF3;
    while ((IICSTAT & (1 << 5)) != 0);
    
    mutex_unlock(&i2c_mtx);
    return 0;
}