summaryrefslogtreecommitdiffstats
path: root/firmware/target/mips/ingenic_x1000/pcm-x1000.c
blob: ef54d45e628458e8904272efddc453a99c70548d (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
/***************************************************************************
 *             __________               __   ___.
 *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
 *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
 *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
 *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
 *                     \/            \/     \/    \/            \/
 * $Id$
 *
 * Copyright (C) 2021 Aidan MacDonald
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
 * KIND, either express or implied.
 *
 ****************************************************************************/

#include "system.h"
#include "kernel.h"
#include "audio.h"
#include "audiohw.h"
#include "pcm.h"
#include "pcm-internal.h"
#include "panic.h"
#include "dma-x1000.h"
#include "irq-x1000.h"
#include "x1000/aic.h"
#include "x1000/cpm.h"

#define AIC_STATE_STOPPED   0
#define AIC_STATE_PLAYING   1

volatile unsigned aic_tx_underruns = 0;

static int aic_state = AIC_STATE_STOPPED;

static int aic_lock = 0;
static volatile int aic_dma_pending_event = DMA_EVENT_NONE;

static dma_desc aic_dma_desc;

static void pcm_play_dma_int_cb(int event);
#ifdef HAVE_RECORDING
static void pcm_rec_dma_int_cb(int event);
#endif

void pcm_play_dma_init(void)
{
    /* Ungate clock, assign pins. NB this overlaps with pins labeled "sa0-sa4"
     * on Ingenic's datasheets but I'm not sure what they are. Probably safe to
     * assume they are not useful to Rockbox... */
    jz_writef(CPM_CLKGR, AIC(0));

    /* Configure AIC with some sane defaults */
    jz_writef(AIC_CFG, RST(1));
    jz_writef(AIC_I2SCR, STPBK(1));
    jz_writef(AIC_CFG, MSB(0), LSMP(0), ICDC(0), AUSEL(1), BCKD(0), SYNCD(0));
    jz_writef(AIC_CCR, ENDSW(0), ASVTSU(0));
    jz_writef(AIC_I2SCR, RFIRST(0), ESCLK(0), AMSL(0));
    jz_write(AIC_SPENA, 0);

    /* Let the target initialize its hardware and setup the AIC */
    audiohw_init();

#if (PCM_NATIVE_BITDEPTH > 16)
    /* Program audio format (stereo, 24 bit samples) */
    jz_writef(AIC_CCR, PACK16(0), CHANNEL_V(STEREO),
              OSS_V(24BIT), ISS_V(24BIT), M2S(0));
    jz_writef(AIC_I2SCR, SWLH(0));
#else
    /* Program audio format (stereo, packed 16 bit samples) */
    jz_writef(AIC_CCR, PACK16(1), CHANNEL_V(STEREO),
              OSS_V(16BIT), ISS_V(16BIT), M2S(0));
    jz_writef(AIC_I2SCR, SWLH(0));
#endif

    /* Set DMA settings */
    jz_writef(AIC_CFG, TFTH(16), RFTH(16));
    dma_set_callback(DMA_CHANNEL_AUDIO, pcm_play_dma_int_cb);
#ifdef HAVE_RECORDING
    dma_set_callback(DMA_CHANNEL_RECORD, pcm_rec_dma_int_cb);
#endif

    /* Mask all interrupts and disable playback/recording */
    jz_writef(AIC_CCR, EROR(0), ETUR(0), ERFS(0), ETFS(0),
              ENLBF(0), ERPL(0), EREC(0));

    /* Enable the controller */
    jz_writef(AIC_CFG, ENABLE(1));

    /* Enable interrupts */
    system_enable_irq(IRQ_AIC);
}

void pcm_play_dma_postinit(void)
{
    audiohw_postinit();
}

void pcm_dma_apply_settings(void)
{
    audiohw_set_frequency(pcm_fsel);
}

static void pcm_dma_start(const void* addr, size_t size)
{
    aic_dma_desc.cm = jz_orf(DMA_CHN_CM, SAI(1), DAI(0), RDIL(9),
                             SP_V(32BIT), DP_V(32BIT), TSZ_V(AUTO),
                             STDE(0), TIE(1), LINK(0));
    aic_dma_desc.sa = PHYSADDR(addr);
    aic_dma_desc.ta = PHYSADDR(JA_AIC_DR);
    aic_dma_desc.tc = size;
    aic_dma_desc.sd = 0;
    aic_dma_desc.rt = jz_orf(DMA_CHN_RT, TYPE_V(I2S_TX));
    aic_dma_desc.pad0 = 0;
    aic_dma_desc.pad1 = 0;

    commit_dcache_range(&aic_dma_desc, sizeof(dma_desc));
    commit_dcache_range(addr, size);

    REG_DMA_CHN_DA(DMA_CHANNEL_AUDIO) = PHYSADDR(&aic_dma_desc);
    jz_writef(DMA_CHN_CS(DMA_CHANNEL_AUDIO), DES8(1), NDES(0));
    jz_set(DMA_DB, 1 << DMA_CHANNEL_AUDIO);
    jz_writef(DMA_CHN_CS(DMA_CHANNEL_AUDIO), CTE(1));

    pcm_play_dma_status_callback(PCM_DMAST_STARTED);
}

static void pcm_dma_handle_event(int event)
{
    if(event == DMA_EVENT_COMPLETE) {
        const void* addr;
        size_t size;
        if(pcm_play_dma_complete_callback(PCM_DMAST_OK, &addr, &size))
            pcm_dma_start(addr, size);
    } else if(event == DMA_EVENT_NONE) {
        /* ignored, so callers don't need to check for this */
    } else {
        pcm_play_dma_status_callback(PCM_DMAST_ERR_DMA);
    }
}

static void pcm_play_dma_int_cb(int event)
{
    if(aic_lock) {
        aic_dma_pending_event = event;
        return;
    } else {
        pcm_dma_handle_event(event);
    }
}

void pcm_play_dma_start(const void* addr, size_t size)
{
    aic_dma_pending_event = DMA_EVENT_NONE;
    aic_state = AIC_STATE_PLAYING;

    pcm_dma_start(addr, size);
    jz_writef(AIC_CCR, TDMS(1), ETUR(1), ERPL(1));
}

void pcm_play_dma_stop(void)
{
    jz_writef(AIC_CCR, TDMS(0), ETUR(0), ERPL(0));
    jz_writef(AIC_CCR, TFLUSH(1));

    aic_dma_pending_event = DMA_EVENT_NONE;
    aic_state = AIC_STATE_STOPPED;
}

void pcm_play_lock(void)
{
    ++aic_lock;
}

void pcm_play_unlock(void)
{
    int irq = disable_irq_save();
    if(--aic_lock == 0 && aic_state == AIC_STATE_PLAYING) {
        pcm_dma_handle_event(aic_dma_pending_event);
        aic_dma_pending_event = DMA_EVENT_NONE;
    }

    restore_irq(irq);
}

#ifdef HAVE_RECORDING
/*
 * Recording
 */

/* FIXME need to implement this!! */

static void pcm_rec_dma_int_cb(int event)
{
    (void)event;
}

void pcm_rec_dma_init(void)
{
}

void pcm_rec_dma_close(void)
{
}

void pcm_rec_dma_start(void* addr, size_t size)
{
    (void)addr;
    (void)size;
}

void pcm_rec_dma_stop(void)
{
}

void pcm_rec_lock(void)
{

}

void pcm_rec_unlock(void)
{

}

const void* pcm_rec_dma_get_peak_buffer(void)
{
    return NULL;
}

void audio_set_output_source(int source)
{
    (void)source;
}

void audio_input_mux(int source, unsigned flags)
{
    (void)source;
    (void)flags;
}
#endif /* HAVE_RECORDING */

void AIC(void)
{
    if(jz_readf(AIC_SR, TUR)) {
        aic_tx_underruns += 1;
        jz_writef(AIC_SR, TUR(0));
    }
}